FIG. 1 is a circuit diagram of a conventional charge pump 10 used to generate a voltage on an integrated circuit chip. Charge pump 10 makes use of capacitors 1-8, which are coupled to diodes 11-19 as illustrated. Capacitors 1, 3, 5, and 7 are coupled in parallel to receive clock signal CLK, and capacitors 2, 4, 6 and 8 are coupled in parallel to receive clock signal CLK#. Clock signal CLK# is the inverse of clock signal CLK.
An input voltage V.sub.IN is provided to diode 11 and an output voltage V.sub.OUT is generated at the output terminal of diode 19. Charge Pump 10 operates by pumping charge along diodes 11-19 as the capacitors 1-8 are successively charged and discharged during each half clock cycle. The voltages at nodes 21-28 are not reset after each pumping cycle. Consequently, the average potential of nodes 21-28 progressively increases from node 21 to node 28.
Charge pump 10 has several disadvantages. First, each of diodes 11-19 experiences a series voltage drop. The sum of these voltage drops limits the voltage generated at the output terminal of diode 19. Thus, many stages are required to generate a high voltage. In addition, it takes many clock cycles to charge capacitors 1-8 to provide the desired output voltage level. This latency exists because charge pump 10 sequentially charges one capacitor at a time, beginning with capacitor 1 and ending with capacitor 8. The output terminal of diode 19 does not reach the desired voltage until capacitor 8 is charged.
Other conventional charge pumps charge a plurality of capacitors in parallel during a first cycle, and then discharge in the capacitors in series during a second cycle, thereby generating a relatively large voltage. Such a charge pump is described in U.S. Pat. No. 5,543,668. However, each stage of this charge pump only increases the output voltage by about V.sub.CC. It therefore requires a relatively large number of stages to generate an output voltage that is significantly greater than the input voltage. For example, this charge pump would require at least five stages to generate an output voltage of 16 Volts.
It would therefore be desirable to have a charge pump that generates a high output voltage in a relatively small number of stages. It would also be desirable if such a charge pump is able to provide the high output voltage in a relatively small number of clock cycles.